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<p>This typedef contains configuration information for the device.  
 <a href="struct_x_sd_ps___config.html#details">More...</a></p>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a02ef7758fed8299c73c8dff376c7a166"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a02ef7758fed8299c73c8dff376c7a166">DeviceId</a></td></tr>
<tr class="memdesc:a02ef7758fed8299c73c8dff376c7a166"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unique ID of device.  <a href="#a02ef7758fed8299c73c8dff376c7a166">More...</a><br/></td></tr>
<tr class="separator:a02ef7758fed8299c73c8dff376c7a166"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a18fc4a81c465a70686b9a3c038e3dbc0"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a18fc4a81c465a70686b9a3c038e3dbc0">BaseAddress</a></td></tr>
<tr class="memdesc:a18fc4a81c465a70686b9a3c038e3dbc0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Base address of the device.  <a href="#a18fc4a81c465a70686b9a3c038e3dbc0">More...</a><br/></td></tr>
<tr class="separator:a18fc4a81c465a70686b9a3c038e3dbc0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0f3c5d739bd1567d28b1ef827aedc75b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a0f3c5d739bd1567d28b1ef827aedc75b">InputClockHz</a></td></tr>
<tr class="memdesc:a0f3c5d739bd1567d28b1ef827aedc75b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input clock frequency.  <a href="#a0f3c5d739bd1567d28b1ef827aedc75b">More...</a><br/></td></tr>
<tr class="separator:a0f3c5d739bd1567d28b1ef827aedc75b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a494f4186575a737efe3f8b3b9848c3c7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a494f4186575a737efe3f8b3b9848c3c7">CardDetect</a></td></tr>
<tr class="memdesc:a494f4186575a737efe3f8b3b9848c3c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Card Detect.  <a href="#a494f4186575a737efe3f8b3b9848c3c7">More...</a><br/></td></tr>
<tr class="separator:a494f4186575a737efe3f8b3b9848c3c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a096af7ddafe53bdf7e4359f3555ae2c4"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a096af7ddafe53bdf7e4359f3555ae2c4">WriteProtect</a></td></tr>
<tr class="memdesc:a096af7ddafe53bdf7e4359f3555ae2c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write Protect.  <a href="#a096af7ddafe53bdf7e4359f3555ae2c4">More...</a><br/></td></tr>
<tr class="separator:a096af7ddafe53bdf7e4359f3555ae2c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aea317a5fc926ce97c26cd7deeecb0c0f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#aea317a5fc926ce97c26cd7deeecb0c0f">BusWidth</a></td></tr>
<tr class="memdesc:aea317a5fc926ce97c26cd7deeecb0c0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Width.  <a href="#aea317a5fc926ce97c26cd7deeecb0c0f">More...</a><br/></td></tr>
<tr class="separator:aea317a5fc926ce97c26cd7deeecb0c0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7fe36b608a4251f5b93c9c74cfb85e08"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a7fe36b608a4251f5b93c9c74cfb85e08">BankNumber</a></td></tr>
<tr class="memdesc:a7fe36b608a4251f5b93c9c74cfb85e08"><td class="mdescLeft">&#160;</td><td class="mdescRight">MIO Bank selection for SD.  <a href="#a7fe36b608a4251f5b93c9c74cfb85e08">More...</a><br/></td></tr>
<tr class="separator:a7fe36b608a4251f5b93c9c74cfb85e08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a892a82eef72bba816d1576cc8b4aa1ba"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a892a82eef72bba816d1576cc8b4aa1ba">HasEMIO</a></td></tr>
<tr class="memdesc:a892a82eef72bba816d1576cc8b4aa1ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">If SD is connected to EMIO.  <a href="#a892a82eef72bba816d1576cc8b4aa1ba">More...</a><br/></td></tr>
<tr class="separator:a892a82eef72bba816d1576cc8b4aa1ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a97543575628c859c83c69a772df955ee"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a97543575628c859c83c69a772df955ee">SlotType</a></td></tr>
<tr class="memdesc:a97543575628c859c83c69a772df955ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Slot type.  <a href="#a97543575628c859c83c69a772df955ee">More...</a><br/></td></tr>
<tr class="separator:a97543575628c859c83c69a772df955ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1f220a7f0690a1d0c7fd0a95b5cec14c"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a1f220a7f0690a1d0c7fd0a95b5cec14c">IsCacheCoherent</a></td></tr>
<tr class="memdesc:a1f220a7f0690a1d0c7fd0a95b5cec14c"><td class="mdescLeft">&#160;</td><td class="mdescRight">If SD is Cache Coherent or not.  <a href="#a1f220a7f0690a1d0c7fd0a95b5cec14c">More...</a><br/></td></tr>
<tr class="separator:a1f220a7f0690a1d0c7fd0a95b5cec14c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6fb9aee8d2b99bd35fc1f328425ea86f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a6fb9aee8d2b99bd35fc1f328425ea86f">ITapDly_SDR_Clk50</a></td></tr>
<tr class="memdesc:a6fb9aee8d2b99bd35fc1f328425ea86f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Tap delay for HSD/SDR25 modes.  <a href="#a6fb9aee8d2b99bd35fc1f328425ea86f">More...</a><br/></td></tr>
<tr class="separator:a6fb9aee8d2b99bd35fc1f328425ea86f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab88ed07cfc347e97ac5391b602081b4c"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#ab88ed07cfc347e97ac5391b602081b4c">OTapDly_SDR_Clk50</a></td></tr>
<tr class="memdesc:ab88ed07cfc347e97ac5391b602081b4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Output Tap delay for HSD/SDR25 modes.  <a href="#ab88ed07cfc347e97ac5391b602081b4c">More...</a><br/></td></tr>
<tr class="separator:ab88ed07cfc347e97ac5391b602081b4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a14ecdc28f2bfb7947ac241e0025b78b5"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a14ecdc28f2bfb7947ac241e0025b78b5">ITapDly_DDR_Clk50</a></td></tr>
<tr class="memdesc:a14ecdc28f2bfb7947ac241e0025b78b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Tap delay for DDR50 modes.  <a href="#a14ecdc28f2bfb7947ac241e0025b78b5">More...</a><br/></td></tr>
<tr class="separator:a14ecdc28f2bfb7947ac241e0025b78b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a97d8fe542ee0224d85448f3e0cc1877c"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a97d8fe542ee0224d85448f3e0cc1877c">OTapDly_DDR_Clk50</a></td></tr>
<tr class="memdesc:a97d8fe542ee0224d85448f3e0cc1877c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Output Tap delay for DDR50 modes.  <a href="#a97d8fe542ee0224d85448f3e0cc1877c">More...</a><br/></td></tr>
<tr class="separator:a97d8fe542ee0224d85448f3e0cc1877c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6c15fcbb080e3e2b428135eb21c02d8b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a6c15fcbb080e3e2b428135eb21c02d8b">OTapDly_SDR_Clk100</a></td></tr>
<tr class="memdesc:a6c15fcbb080e3e2b428135eb21c02d8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Tap delay for SDR50 modes.  <a href="#a6c15fcbb080e3e2b428135eb21c02d8b">More...</a><br/></td></tr>
<tr class="separator:a6c15fcbb080e3e2b428135eb21c02d8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a365ea7869549e591ca1e48a3c89d91ca"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a365ea7869549e591ca1e48a3c89d91ca">OTapDly_SDR_Clk200</a></td></tr>
<tr class="memdesc:a365ea7869549e591ca1e48a3c89d91ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Tap delay for SDR104/HS200 modes.  <a href="#a365ea7869549e591ca1e48a3c89d91ca">More...</a><br/></td></tr>
<tr class="separator:a365ea7869549e591ca1e48a3c89d91ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2ab8b411b04ba543826fdd91794b4c87"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_sd_ps___config.html#a2ab8b411b04ba543826fdd91794b4c87">OTapDly_DDR_Clk200</a></td></tr>
<tr class="memdesc:a2ab8b411b04ba543826fdd91794b4c87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Tap delay for HS400 modes.  <a href="#a2ab8b411b04ba543826fdd91794b4c87">More...</a><br/></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This typedef contains configuration information for the device. </p>
</div><h2 class="groupheader">Field Documentation</h2>
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          <td class="memname">u32 XSdPs_Config::BankNumber</td>
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<p>MIO Bank selection for SD. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga0941061de89eef852f88a589b743983c">XSdPs_IdentifyEmmcMode()</a>, and <a class="el" href="group__sdps__api.html#ga220352b3948b59ad89e32bb71579b861">XSdPs_SetTapDelay_SDR104()</a>.</p>

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          <td class="memname">UINTPTR XSdPs_Config::BaseAddress</td>
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<p>Base address of the device. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#ga089a1b91f436e99b0663b91c3038e9ce">XSdPs_AutoTuning()</a>, <a class="el" href="group__sdps__api.html#ga121220c9912174a846e46a4c1ef388d3">XSdPs_CardIfCond()</a>, <a class="el" href="group__sdps__api.html#ga6c8f3a195672b1225b967c936c2e26ca">XSdPs_CardOpCond()</a>, <a class="el" href="group__sdps__api.html#ga6b65625dd94d082f21d8dedfdfd8db97">XSdPs_CardSetVoltage18()</a>, <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga6bc000fb4ce51502058f2e351c90fc19">XSdPs_Change_BusSpeed()</a>, <a class="el" href="group__sdps__api.html#gaf11db1719933123762fecb790a2977da">XSdPs_Change_BusWidth()</a>, <a class="el" href="group__sdps__api.html#ga1f8661e4ae53a7c29b3fd44cc56a3673">XSdPs_Change_ClkFreq()</a>, <a class="el" href="group__sdps__api.html#ga273b141e9bacac12fd3b3123b7827faa">XSdPs_Change_SdBusSpeed()</a>, <a class="el" href="group__sdps__api.html#gaf0101a5bb2238bcf0279c3e4c0a33ccb">XSdPs_CheckBusHigh()</a>, <a class="el" href="group__sdps__api.html#ga3c9d104a1d7f9e14d8b2b79fbb47702d">XSdPs_CheckBusIdle()</a>, <a class="el" href="group__sdps__api.html#ga9c1007ef091d85466eb133a80b9f3213">XSdPs_CheckCardDetect()</a>, <a class="el" href="group__sdps__api.html#gae561ac5fb9655a8c8523a7afd848f8cd">XSdPs_CheckResetDone()</a>, <a class="el" href="group__sdps__api.html#gafa28027fec9472b8b49c61ad1c9489f2">XSdPs_CheckTransferComplete()</a>, <a class="el" href="group__sdps__api.html#gaaa85509249cb90b33c8a201a751bdd8f">XSdps_CheckTransferDone()</a>, <a class="el" href="group__sdps__api.html#gafa42ece30f32bbc385f0533873461b2d">XSdPs_CheckVoltage18()</a>, <a class="el" href="group__sdps__api.html#ga1c5c45efb0402b9d8e6a33d036dbd220">XSdPs_CmdTransfer()</a>, <a class="el" href="group__sdps__api.html#gacae52488893efc2acb048af3660254f5">XSdPs_ConfigDma()</a>, <a class="el" href="group__sdps__api.html#ga5d77b69b0e2e4ca66556dc8a90f834c4">XSdPs_ConfigInterrupt()</a>, <a class="el" href="group__sdps__api.html#ga8644655cee22998e56ef1dba7871ac89">XSdPs_ConfigPower()</a>, <a class="el" href="group__sdps__api.html#gacf453a36b7ec19fb4b5dbfda827cc6a7">XSdPs_ConfigTapDelay()</a>, <a class="el" href="group__sdps__api.html#gaa42580dd8c7438e838e274579d9c4be3">XSdPs_DisableBusPower()</a>, <a class="el" href="group__sdps__api.html#gad837da458a367f226a76d8eda9a09214">XSdPs_DllReset()</a>, <a class="el" href="group__sdps__api.html#gaf51d4f72c727b7d28592ac797fe5d467">XSdPs_DllRstCtrl()</a>, <a class="el" href="group__sdps__api.html#gaca5e99fecb052c0552ab2d7a692a21ad">XSdPs_EnableBusPower()</a>, <a class="el" href="group__sdps__api.html#gad6793165c476a72b093f179766ab176f">XSdPs_EnableClock()</a>, <a class="el" href="group__sdps__api.html#gae356e151de825904653850dc1f2de4e7">XSdPs_Erase()</a>, <a class="el" href="group__sdps__api.html#ga9645b197623dae8c5183bb3d31c7b0eb">XSdPs_GetCardId()</a>, <a class="el" href="group__sdps__api.html#ga24e128116e1fd880b3ed1ffe7709e75d">XSdPs_GetCsd()</a>, <a class="el" href="group__sdps__api.html#ga90976f95bfd56ede8ee75175610c4c58">XSdPs_HostConfig()</a>, <a class="el" href="group__sdps__api.html#ga87790bbe65eea7bf873f401121f4a6f7">XSdPs_IdentifyCard()</a>, <a class="el" href="group__sdps__api.html#gae55b1aa663629e99a9da94619c7487c5">XSdPs_MmcCardInitialize()</a>, <a class="el" href="group__sdps__api.html#gab802e347cc12cdd73d4d9dd7737535e6">XSdPs_Reset()</a>, <a class="el" href="group__sdps__api.html#ga43c82653cd80c9c1eb82db2eec0d7718">XSdPs_ResetConfig()</a>, <a class="el" href="group__sdps__api.html#ga0446c3fbdc875f25c1bbf74efa3ff970">XSdPs_SendCmd()</a>, <a class="el" href="group__sdps__api.html#ga1af3178b4b24c991b431eb7a0aa3b23b">XSdPs_SetBlkSize()</a>, <a class="el" href="group__sdps__api.html#ga45d325b142a6526ec0468d1fbc34c471">XSdPs_SetClock()</a>, <a class="el" href="group__sdps__api.html#ga2e868dda7aa547805fe79f9e840059e5">XSdPs_SetExecTuning()</a>, <a class="el" href="group__sdps__api.html#ga8fc46805b1c3026474ca3b26142a9133">XSdPs_Setup32ADMA2DescTbl()</a>, <a class="el" href="group__sdps__api.html#gaed024f423e3600d7ec230f7ca8bb1118">XSdPs_Setup64ADMA2DescTbl()</a>, <a class="el" href="group__sdps__api.html#gad03504fb7e11f640d478e5db67f2beb3">XSdPs_SetupADMA2DescTbl64Bit()</a>, <a class="el" href="group__sdps__api.html#ga38aad34c4dd588d187c6053a9514c52e">XSdPs_SetupCmd()</a>, <a class="el" href="group__sdps__api.html#ga4fde94c65a7c6e64e2444cb33e7d0431">XSdPs_SetupReadDma()</a>, <a class="el" href="group__sdps__api.html#ga78d4cd8fc91d6c32b6ed35bd86581cb3">XSdPs_SetupTransfer()</a>, <a class="el" href="group__sdps__api.html#ga1dcb11223d1894628593253fd7144c42">XSdPs_SetupVoltageSwitch()</a>, <a class="el" href="group__sdps__api.html#ga7deb56821f069d713aa76a10b83c4baa">XSdPs_SetupWriteDma()</a>, and <a class="el" href="group__sdps__api.html#gab75b25b7d98ac1e72aa60cda683ffcda">XSdPs_SetVoltage18()</a>.</p>

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<a class="anchor" id="aea317a5fc926ce97c26cd7deeecb0c0f"></a>
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          <td class="memname">u32 XSdPs_Config::BusWidth</td>
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<p>Bus Width. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#ga6c8f3a195672b1225b967c936c2e26ca">XSdPs_CardOpCond()</a>, <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#gaf11db1719933123762fecb790a2977da">XSdPs_Change_BusWidth()</a>, <a class="el" href="group__sdps__api.html#ga643a4036059e0a3094c22f46b1adccc8">XSdPs_EmmcModeInit()</a>, <a class="el" href="group__sdps__api.html#ga8e9a576dfdb4440a795eb6e712994050">XSdPs_SdCardInitialize()</a>, and <a class="el" href="group__sdps__api.html#gab81250892c84553ab4738f038ed35edf">XSdPs_SdModeInit()</a>.</p>

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<div class="memitem">
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          <td class="memname">u32 XSdPs_Config::CardDetect</td>
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<p>Card Detect. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga9c1007ef091d85466eb133a80b9f3213">XSdPs_CheckCardDetect()</a>, <a class="el" href="group__sdps__api.html#gae356e151de825904653850dc1f2de4e7">XSdPs_Erase()</a>, and <a class="el" href="group__sdps__api.html#ga78d4cd8fc91d6c32b6ed35bd86581cb3">XSdPs_SetupTransfer()</a>.</p>

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          <td class="memname">u16 XSdPs_Config::DeviceId</td>
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<p>Unique ID of device. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::HasEMIO</td>
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<p>If SD is connected to EMIO. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>.</p>

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<a class="anchor" id="a0f3c5d739bd1567d28b1ef827aedc75b"></a>
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          <td class="memname">u32 XSdPs_Config::InputClockHz</td>
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<p>Input clock frequency. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gacd492dfefb8a2fe67964993032250bd4">XSdPs_CalcClock()</a>, <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, and <a class="el" href="group__sdps__api.html#gafe05874a0c1191faf537b69af39cdef5">XSdPs_Identify_UhsMode()</a>.</p>

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<a class="anchor" id="a1f220a7f0690a1d0c7fd0a95b5cec14c"></a>
<div class="memitem">
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          <td class="memname">u8 XSdPs_Config::IsCacheCoherent</td>
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<p>If SD is Cache Coherent or not. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#gafc7e71cb62142d0ef939336195102666">XSdPs_Get_BusSpeed()</a>, <a class="el" href="group__sdps__api.html#ga864452e1802367600d196ccc37310f7c">XSdPs_Get_BusWidth()</a>, <a class="el" href="group__sdps__api.html#ga69e8d7cd927da4273a12d0d5fb3f36ff">XSdPs_Get_Mmc_ExtCsd()</a>, <a class="el" href="group__sdps__api.html#gaa26e9b4a046701024b01b1b0cb48ed08">XSdPs_Get_Status()</a>, <a class="el" href="group__sdps__api.html#ga8dfe3686ed74d09a2a46a7b5cddcde47">XSdPs_ReadPolled()</a>, <a class="el" href="group__sdps__api.html#ga8fc46805b1c3026474ca3b26142a9133">XSdPs_Setup32ADMA2DescTbl()</a>, <a class="el" href="group__sdps__api.html#gaed024f423e3600d7ec230f7ca8bb1118">XSdPs_Setup64ADMA2DescTbl()</a>, <a class="el" href="group__sdps__api.html#gad03504fb7e11f640d478e5db67f2beb3">XSdPs_SetupADMA2DescTbl64Bit()</a>, <a class="el" href="group__sdps__api.html#ga4fde94c65a7c6e64e2444cb33e7d0431">XSdPs_SetupReadDma()</a>, and <a class="el" href="group__sdps__api.html#ga7deb56821f069d713aa76a10b83c4baa">XSdPs_SetupWriteDma()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::ITapDly_DDR_Clk50</td>
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<p>Input Tap delay for DDR50 modes. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga0941061de89eef852f88a589b743983c">XSdPs_IdentifyEmmcMode()</a>, and <a class="el" href="group__sdps__api.html#gae8066fed7198c31836229aeb151ab569">XSdPs_SetTapDelay_DDR50()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::ITapDly_SDR_Clk50</td>
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<p>Input Tap delay for HSD/SDR25 modes. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga0941061de89eef852f88a589b743983c">XSdPs_IdentifyEmmcMode()</a>, <a class="el" href="group__sdps__api.html#gab81250892c84553ab4738f038ed35edf">XSdPs_SdModeInit()</a>, and <a class="el" href="group__sdps__api.html#ga0dbbe882b04aab3d81add6021a8698bf">XSdPs_SetTapDelay_SDR25()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::OTapDly_DDR_Clk200</td>
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<p>Input Tap delay for HS400 modes. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::OTapDly_DDR_Clk50</td>
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<p>Output Tap delay for DDR50 modes. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga0941061de89eef852f88a589b743983c">XSdPs_IdentifyEmmcMode()</a>, and <a class="el" href="group__sdps__api.html#gae8066fed7198c31836229aeb151ab569">XSdPs_SetTapDelay_DDR50()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::OTapDly_SDR_Clk100</td>
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<p>Input Tap delay for SDR50 modes. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, and <a class="el" href="group__sdps__api.html#gafc5e8e46a354e7a21b046435382bba12">XSdPs_SetTapDelay_SDR50()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::OTapDly_SDR_Clk200</td>
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<p>Input Tap delay for SDR104/HS200 modes. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga0941061de89eef852f88a589b743983c">XSdPs_IdentifyEmmcMode()</a>, and <a class="el" href="group__sdps__api.html#ga220352b3948b59ad89e32bb71579b861">XSdPs_SetTapDelay_SDR104()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::OTapDly_SDR_Clk50</td>
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<p>Output Tap delay for HSD/SDR25 modes. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#ga0941061de89eef852f88a589b743983c">XSdPs_IdentifyEmmcMode()</a>, <a class="el" href="group__sdps__api.html#gab81250892c84553ab4738f038ed35edf">XSdPs_SdModeInit()</a>, and <a class="el" href="group__sdps__api.html#ga0dbbe882b04aab3d81add6021a8698bf">XSdPs_SetTapDelay_SDR25()</a>.</p>

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<a class="anchor" id="a97543575628c859c83c69a772df955ee"></a>
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          <td class="memname">u8 XSdPs_Config::SlotType</td>
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<p>Slot type. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>, <a class="el" href="group__sdps__api.html#gab81250892c84553ab4738f038ed35edf">XSdPs_SdModeInit()</a>, <a class="el" href="group__sdps__api.html#gae8066fed7198c31836229aeb151ab569">XSdPs_SetTapDelay_DDR50()</a>, and <a class="el" href="group__sdps__api.html#ga0dbbe882b04aab3d81add6021a8698bf">XSdPs_SetTapDelay_SDR25()</a>.</p>

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          <td class="memname">u32 XSdPs_Config::WriteProtect</td>
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<p>Write Protect. </p>

<p>Referenced by <a class="el" href="group__sdps__api.html#gaf99da6fcfbc311afcd2d6e8a94c5fe55">XSdPs_CfgInitialize()</a>.</p>

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